The present invention relates generally to Metal Insulator semiconductor Effect Transistors (MISFETs), and more particularly to a MISFET having an insulating layer arranged between a gate electrode and a semiconductor substrate.
When two layers with different electrical and chemical properties adjoin each other, generally the result is a so-called heterostructure. These heterostructures have fundamentally new electrical characteristics which can be controlled through technological means as disclosed in J. Appl. Phys., vol. 62 (1987), pp 3799 to 3802, and Appl. Phys., vol. A 48 (1989), pp 549 to 558). A decisive and important role is played by heterostructures in FETs, which are manufactured predominantly with silicon (Si) using a highly developed process technique. At the present time, the application of the FET principle to other semiconductor materials, such as Ge, GaAs, GaP and InP, which to an extent have better electronic properties, is very restricted. This is because it is not possible to produce an insulating layer, in the form of an oxide of the semiconductor material ("gate oxide"), that is suited for interconnecting the gate electrode and that is free of boundary charges--as in Metal Oxide Semiconductor (MOS) technology--and because other insulating layers as well, for example of plastic, as is the case with MISFETs, cannot be connected to the semiconductor surface so that they are free of boundary charges.
To produce field-effect transistors using semiconductor materials other than silicon, the metal Semiconductor Field Effect Transistor (MESFET) principle and the Junction FET (JFET) principle are preferably applied instead of the MISFET principle, as disclosed in W. Kellner, H. Kniepkamp GaAs Feldeffekttransistoren (GaAs Field-Effect Transistors), 2nd edition (1989), Springer Publishing House, pp 19 to 29 and 55. These principles are based on the use of the Sohottky barrier that forms between the gate electrode and the semiconductor material or on the use of the potential barrier of a p-n junction. High switching rates can in fact be achieved with such systems, however generally this means relatively high leakage currents. A fundamental disadvantage is also a comparatively low blocking voltage, which has a considerable adverse effect on the operating voltage for the system.
Generally, the following demands are placed on insulating layers in MISFETs, particularly on those based on GaAs and InP:
deposition in a low-temperature process to avoid material damage to the semiconductor material, that is splitting-off of certain components, e.g. As in the case of GaAs;
stable adhesion to the semiconductor surface;
saturation of possible existing free valences in the semiconductor surface (so-called "dangling bonds") to eliminate surface defects or recombination centers;
production of heterostructures having good recharging capability with the semiconductor; and
low leakage currents or no pin holes.
The present invention is directed to the problem of developing a MISFET having an insulating layer arranged between a gate electrode and a semiconductor substrate in such a way that the boundary surface between the insulator and the semiconductor will have few defects.